CVE-2025-50897 – Riscv-Boom SonicBOOM MMU Write Permission Fault

The following table lists the changes that have been made to the
CVE-2025-50897 vulnerability over time.

Vulnerability history details can be useful for understanding the evolution
of a vulnerability, and for identifying the most recent changes that may
impact the vulnerability’s severity, exploitability, or other characteristics.

  • New CVE Received
    by [email protected]

    Aug. 19, 2025

    Action Type Old Value New Value
    Added Description A vulnerability exists in riscv-boom SonicBOOM 1.2 (BOOMv1.2) processor implementation, where valid virtual-to-physical address translations configured with write permissions (PTE_W) in SV39 mode may incorrectly trigger a Store/AMO access fault during store instructions (sd). This occurs despite the presence of proper page table entries and valid memory access modes. The fault is reproducible when transitioning into virtual memory and attempting store operations in mapped kernel memory, indicating a potential flaw in the MMU, PMP, or memory access enforcement logic. This may cause unexpected kernel panics or denial of service in systems using BOOMv1.2.
    Added Reference https://github.com/LuLuji04/POC-Boomv1.2
    Added Reference https://github.com/riscv-boom/riscv-boom
    Added Reference https://github.com/riscv-software-src/riscv-isa-sim
Share the Post:

Related Posts